Five Forces Reshaping AI Infrastructure in 2025
Submitted by Agne Zarombaite on May 21, 2025 - 12:24pm
Five Forces Reshaping AI Infrastructure in 2025
Submitted by Agne Zarombaite on May 21, 2025 - 12:22pm
Over the last six months, we held two dozen closed‑door interviews with the people who pour the concrete, sign the power‑purchase agreements, and deploy the GPUs that drive today’s AI boom. They ranged from Fortune‑100 cloud operators and traditional utilities to private‑equity financiers and immersion‑cooling specialists.
Taken together, the conversations reveal a market in hyper‑growth mode but constrained by physics - power density, transmission capacity, thermal limits, and by a brutally tight equipment supply chain. Five forces rise above the noise and will shape every capital‑allocation decision in AI infrastructure during 2025.
Nalini Garg
California State Ambassador
Women In AI
Nalini is a recognized leader at Deloitte in AI & Data Practice, standing at the forefront of AI innovation and Strategy. With a distinct path of achievements, she delivered over 30 talks on generative AI, emphasizing its safe usage and business efficiencies for life sciences and tech companies. Nominated as top 100 women in AI for 2023, 2024, she currently serves as the California state ambassador for Women in AI. Beyond her professional prowess, Nalini is a wellness instructor, artist, and a podcast host.
Ipsita Mohanty
Vice Chair
IEEE Women in Engineering
Ipsita Mohanty is an accomplished AI Leader and Vice Chair of IEEE Women in Engineering, Santa Clara Valley, Region 6. With over 15 years of experience spanning Salesforce, Goldman Sachs, Walmart Labs, and Amdocs, she has led several impactful AI-driven initiatives, including architecting Salesforce-Tableau Agents and enhancing recommendation systems at Walmart. Ipsita holds a Master’s degree in Information Technology from Carnegie Mellon University and a Bachelor’s in Computer Science and Engineering from KIIT University. She is also the co-founder of QApp, an AI/ML automation platform empowering freelancers. Winner of several AI Awards and recognized among the Top 100 Women in AI Leaders globally, she actively contributes to AI research and community leadership while championing diversity in technology.
Shweta Behere
Senior Engineering Manager
Workday
Shweta Behere is a Senior Engineering Manager at Workday, where she leads cloud platform engineering teams dedicated to building resilient and scalable systems. She is at the forefront of delivering AI solutions to enhance cloud platform infrastructure and observability. She currently serves as the IEEE Chair for the Women in Engineering Affinity Group for the Santa Clara Valley Section.
With over 18 years of experience, Shweta has made significant contributions to advancing public cloud, storage, and virtualization technologies, resulting in multiple patents and publications highlighting her innovative impact. Her leadership has earned her industry recognition, including being named among the “Top 50 Women of Impact in 2025" by Women Impact Tech and one of the “30 Outstanding Women in Engineering Leadership” by the Women Tech Network for her substantial contributions to the field.
Shweta is passionate about promoting women in engineering fields. As a thought leader, she addresses the challenges of balancing career and parenthood in tech, sharing her insights through articles and panel discussions. Through her mentorship, advocacy, and leadership, Shweta Behere inspires the next generation of technologists, especially women, and actively cultivates a more inclusive and supportive environment.
IEEE Women in Engineering
Website: https://wie.ieee.org/
Please visit our website for more information.Women in AI
Website: https://www.womeninai.co/
Women in AI (WAI) is a nonprofit do-tank working towards inclusive AI that benefits global society. We are a community-driven initiative bringing empowerment, knowledge and active collaboration via education, research, events, and blogging.
At Women in AI we empower women and minorities to become AI & Data experts, innovators and leaders. We encourage ethical applications and responsible use of artificial intelligence.
Mission: Women in AI is a community working towards shaping inclusive AI for our common future
Nalini Garg
California State Ambassador
Women In AI
Nalini is a recognized leader at Deloitte in AI & Data Practice, standing at the forefront of AI innovation and Strategy. With a distinct path of achievements, she delivered over 30 talks on generative AI, emphasizing its safe usage and business efficiencies for life sciences and tech companies. Nominated as top 100 women in AI for 2023, 2024, she currently serves as the California state ambassador for Women in AI. Beyond her professional prowess, Nalini is a wellness instructor, artist, and a podcast host.
Ipsita Mohanty
Vice Chair
IEEE Women in Engineering
Ipsita Mohanty is an accomplished AI Leader and Vice Chair of IEEE Women in Engineering, Santa Clara Valley, Region 6. With over 15 years of experience spanning Salesforce, Goldman Sachs, Walmart Labs, and Amdocs, she has led several impactful AI-driven initiatives, including architecting Salesforce-Tableau Agents and enhancing recommendation systems at Walmart. Ipsita holds a Master’s degree in Information Technology from Carnegie Mellon University and a Bachelor’s in Computer Science and Engineering from KIIT University. She is also the co-founder of QApp, an AI/ML automation platform empowering freelancers. Winner of several AI Awards and recognized among the Top 100 Women in AI Leaders globally, she actively contributes to AI research and community leadership while championing diversity in technology.
Shweta Behere
Senior Engineering Manager
Workday
Shweta Behere is a Senior Engineering Manager at Workday, where she leads cloud platform engineering teams dedicated to building resilient and scalable systems. She is at the forefront of delivering AI solutions to enhance cloud platform infrastructure and observability. She currently serves as the IEEE Chair for the Women in Engineering Affinity Group for the Santa Clara Valley Section.
With over 18 years of experience, Shweta has made significant contributions to advancing public cloud, storage, and virtualization technologies, resulting in multiple patents and publications highlighting her innovative impact. Her leadership has earned her industry recognition, including being named among the “Top 50 Women of Impact in 2025" by Women Impact Tech and one of the “30 Outstanding Women in Engineering Leadership” by the Women Tech Network for her substantial contributions to the field.
Shweta is passionate about promoting women in engineering fields. As a thought leader, she addresses the challenges of balancing career and parenthood in tech, sharing her insights through articles and panel discussions. Through her mentorship, advocacy, and leadership, Shweta Behere inspires the next generation of technologists, especially women, and actively cultivates a more inclusive and supportive environment.
Apala Guha
Principal AI Architect
Microsoft
Apala Guha is Principal AI Architect at Microsoft. In her current role, she studies AI model architectures and analyzes their behavior and performance on GPUs. With these insights, she co-designs SoCs, systems and compilers for Azure AI. In the past, she was part of AI hardware development at Tenstorrent and Lightmatter. She has a PhD in Computer Engineering from University of Virginia and has held several academic research positions on accelerator compilers.
IEEE Women in Engineering
Website: https://wie.ieee.org/
Please visit our website for more information.Women in AI
Website: https://www.womeninai.co/
Women in AI (WAI) is a nonprofit do-tank working towards inclusive AI that benefits global society. We are a community-driven initiative bringing empowerment, knowledge and active collaboration via education, research, events, and blogging.
At Women in AI we empower women and minorities to become AI & Data experts, innovators and leaders. We encourage ethical applications and responsible use of artificial intelligence.
Mission: Women in AI is a community working towards shaping inclusive AI for our common future
Alex Fleetwood
Chief Solutions Architect
Vaire
Alex Fleetwood is Chief Solutions Architect at Vaire Computing, a deep-tech startup pioneering near-zero energy AI chips based on reversible computing. A serial founder with multiple successful startups under their belt, Alex has built and scaled interdisciplinary teams at the cutting edge of AI, hardware, and systems design. At Vaire, he is responsible for strategic partnerships, go-to-market strategy, and leading engagements with hyperscalers, government agencies, and foundries.
Vaire Computing
Website: https://vaire.co/
Vaire Computing is building Near-Zero Energy Chips to unlock the future of computing. New chip architectures are inevitable as Moore’s Law slows while the AI era drives unprecedented demand.The energy consumption of conventional computing is rising rapidly and is unsustainable. Reversible Computing offers a rare breakthrough: a way to decouple energy use from compute growth, enabling the hardware required for the machine intelligence revolution.
Recent findings from Vaire's first test chip, fabricated in standard CMOS, verify energy recovery and provide a pathway to production silicon this decade. The technology unlocks novel architectures and topologies due to radically reduced heat dissipation.
Vaire brings together world experts in Reversible Computing alongside experienced chip designers, engineers, and product leaders. With operations in London and the Bay Area, the team has raised seed funding from Lifeline and 7Percent Ventures and strategic angels.
Generative AI is fundamentally changing how datacenters are built, putting three types of silicon center-stage: GPUs, custom AI ASICs, and advanced networking processors. Driven by these technologies, the datacenter processor market soared to $147 billion in 2024 and is expected to double by 2030, largely thanks to explosive growth in GPUs and specialized AI ASICs.
While GPUs remain the reference for AI training and inference, hyperscale providers, eager to reduce their dependence on Nvidia, are increasingly co-designing specialized AI ASICs with chipmakers like Broadcom, Marvell, and Alchip. These ASICs sacrifice some versatility to achieve superior performance and energy efficiency, creating opportunities for a thriving startup scene featuring companies like Groq, Cerebras, and Tenstorrent, and spurring major waves of venture investment and mergers. Crucially, chiplet architectures, which combine multiple smaller chip components into a single, optimized package, are now key to driving GPU and ASIC performance upward, beyond what traditional single-chip designs can deliver.
As AI models become ever larger and require responses within milliseconds, networking silicon has become just as critical as processors themselves. DPUs, smart network cards, and advanced switches now coordinate massive arrays of accelerators, making both scale-up and scale-out networks a pivotal part of datacenter performance.
Adrien Sanchez
Senior Technology & Market Analyst, Computing & Software
Yole Intelligence
Adrien Sanchez is Senior Technology & Market Analyst, Computing at Yole Group.
Adrien produces technology & market analyses covering computing hardware and software, AI, machine learning and neural networks.
Prior to Yole Group, he worked at AW Europe (Belgium), where he focused on image recognition & comprehension for ADAS. He also worked at ACOEM (France) on real-time sound classification using deep learning and edge computing.
Adrien graduated with a double degree at Grenoble Institute of Technology PHELMA (Grenoble INP Phelma, France) and Grenoble Ecole de Management (GEM, France), and he earned an MSc on AI at Heriot-Watt University (Edinburgh, UK).
Hugo Antoine
Technology & Market Analyst, Computing & Software
Yole Group
Hugo Antoine is a Technology & Market Analyst, Computing and Software at Yole Group.
Hugo develops technology & market analyses covering computing hardware, software, and Artificial Intelligence (AI).
He holds a master's degree from Ecole des Mines de Saint-Etienne (France), with a focus on microelectronics and computing at the Centre of Microelectronics in Provence (France). In addition, he pursued an AI specialization at Ecole Polytechnique de Montreal (Canada). Furthermore, he completed a dual-degree program in innovation management at emlyon business school, highlighting his expertise at the intersection of technology and business.
Ultra Ethernet Consortium
Website: https://ultraethernet.org/
Ultra Ethernet Consortium (UEC) is bringing together leading companies for industry-wide cooperation to build a complete Ethernet-based communication stack architecture for high-performance networking. Artificial Intelligence (AI) and High-Performance Computing (HPC) workloads are rapidly evolving and require best-in-class functionality, performance, interoperability and total cost of ownership, without sacrificing developer and end-user friendliness. The Ultra Ethernet solution stack will capitalize on Ethernet’s ubiquity and flexibility for handling a wide variety of workloads while being scalable and cost-effective.
Ultra Ethernet Consortium is founded by companies with long-standing history and experience in high-performance solutions. Each member is contributing significantly to the broader ecosystem of high-performance in an egalitarian manner. The founding members include AMD, Arista, Broadcom, Cisco, Eviden (an Atos Business), HPE, Intel, Meta and Microsoft, who collectively have decades of networking, AI, cloud and high-performance computing-at-scale deployments.
This demo will showcase how Innodisk’s AccelBrain AI software stack powers on‑premise, private large language model (LLM) deployment and then extends those capabilities to the edge. We’ll show how AccelBrain seamlessly integrates with our APEX-E100 and APEX-P200 platforms, enabling efficient, secure, and real‑time AI processing at the edge—without relying on the cloud.
Don Yu
Special Assistant to the General Manager
Innodisk
Don Yu is the Special Assistant to the General Manager at Innodisk Corporation (TAIDEX: 5289). He joined the industrial PC field in 2002 and dedicated his sales profession in Korea, Pan-Asia, and the ANZ region from 2002 ~ to 2012. He works closely with local distributors, system integrators, value-added resellers, and Reps. He builds excellent relationships with clients and related teams and has several successful ODM/Customization project records in various industries and applications.
Starting in 2012, his job role was changed from a sales perspective to a product management perspective. He led his former company to be one of the significant AIoT, 5G/ Networking AIoT, and Medical solution providers worldwide.
With 20 years of experience in the industrial PC field, Mr. Don Yu joined Innodisk in 2021 and assisted Innodisk in migrating to the path of AI.
Mr. Don Yu's vision is to contribute to the Earth by leading a team and providing more intelligent solutions to improve our environment and make it a better place to live.
Innodisk
Website: https://www.innodisk.com/index
Innodisk is a global leader in industrial-grade memory, storage, and AIoT solutions. Headquartered in Taiwan with a strong international footprint, Innodisk has held the largest market share in industrial-grade storage since its founding in 2005 and ranks among the world’s top providers of industrial memory modules.
As AI technology continues to evolve, Innodisk leverages its deep expertise, innovative engineering, and integrated hardware-software approach to deliver customized solutions that power the future of AIoT. Through close collaboration with industry partners, we are accelerating the adoption of intelligent applications across sectors—paving the way for a smarter, more connected world.
Explore our solutions and success stories at www.innodisk.com.
Scaling AI accelerators only happens with extreme density and high-speed performance interconnects. Samtec’s Si-Fly® HD co-packaged interconnect systems provide the highest density 224 Gbps PAM4 solution in today's market. Electrically pluggable co-packaged copper and optics solutions (known as CPX) adjacent to AI accelerators are achievable on a 95 mm x 95 mm or smaller substrates. This proximity eliminates long PCB traces, greatly reducing loss while preserving serviceability in a pluggable form factor.
In the Demo Stage presentation, Samtec technical experts will summarize real-world performance data of CPX implementations in various 224 Gbps PAM4 signal channels typically found in AI acceleration platforms. Additionally, an preview of AI scale-up and scale-out networks using CPX technologies will also be presented.
Matthew Burns
Global Director, Technical Marketing
Samtec
Matthew Burns develops go-to-market strategies for Samtec’s Silicon-to-Silicon solutions. Over the course of 25 years, he has been a leader in design, applications engineering, technical sales and marketing in the telecommunications, medical and electronic components industries. He currently serves as Secretary at PICMG. Mr. Burns holds a B.S. in Electrical Engineering from Penn State University.
Samtec
Website: http://www.samtec.com/AI
Founded in 1976, Samtec is a privately held, $822 MM global manufacturer of a broad line of electronic interconnect solutions, including High-Speed Board-to-Board, High-Speed Cables, Mid-Board and Panel Optics, Precision RF, Flexible Stacking, and Micro/Rugged components and cables. With 40+ location severing approximately 125 countries, Samtec’s global presence enables its unmatched customer service.