
Lital Gilad-Shaoulian

Sherry Marcus

Vivek Lal

Sandeep Garg
Sandeep Garg is the Director of Engineering for Catapult at Siemens EDA, responsible for our High-Level Synthesis (HLS) and verification products.
Sandeep has more than 26 years of experience in EDA industry, 18+ of which have been HLS and verification at Siemens, Mentor Graphics and Calypto in various leadership roles in engineering. Catapult’s bottom-up and low-power solutions were launched under Sandeep’s leadership. Sandeep has been instrumental in building up an extensive network of partnerships and ecosystem with academia and research institutes around Catapult HLS, helping evangelize the HLS tools and methodologies and collaborating with cutting edge research initiatives. Before HLS, Sandeep was an architect and a technology and program manager for Mentor Graphics’ Precision FPGA synthesis product line, helping replace their old HDL frontend with a modern alternative and contributing significantly to both its frontend and backend optimizations.
Sandeep came to Mentor Graphics via IKOS Systems acquisition where he was working on hardware-assisted co-simulation products and RTL compiler technology that have since been adopted by many SEDA products.